NAT-MCH-PCIex80

The NAT-MCH-PCIex80 is a PCI Express (PCIe) Gen3 HUB-Module with uplink feature for the double-width NAT-MCH-PHYS80. Its 80-lane PCIe switch provides x1 / x4 links to all AMCs, and up to x16 via an optional optical front uplink. If a NAT-RTM module is attached to the NAT-MCH-PHYS-80, it also can be connected with up to x16.

PCIe Connections to the Backplane:

The NAT-MCH-PCIex80 provides PCIe Gen3 x1 or x4 links to all 12 AMCs in the MTCA system. The PCIe switch also accommodates higher bandwidths, i.e. x8 or x16, to a reduced number of AMC slots. Please note, that the backplane must support this feature.

Optical Front Uplink:

Optical front uplink functionality is available as an option. Depending on the chosen variant, the NAT-MCH-PCIex80 comes with one (x8) or two (x16) optical transceivers. So with the x8 variant, one PCIe Gen3 x8 link is available at the front panel. Choosing x16 allows for two x8 or one x16 connection.

RTM Connectivity:

If a NAT-MCH-RTM is attached to the MCH, it can be supplied by another PCIe Gen3 x16 connection.

The PCIe switch provides the ability to establish up to four virtual PCIe clusters and assign the AMC slots to these. The up to four PCIe Root Complexes can be any of the AMC-CPUs, the CPU located on the NAT-MCH-RTM, or an external PC.

With PCIe Gen3 x8 / x16 links towards the optical uplink and the NAT-MCH-RTM, the NAT-MCH-PCIex80 HUB-Module aims for applications like high energy physics research, telecommunication etc.

Processing Resources

• Lattice MachXO2 FPGA
• Atmel ATmega1284P
• PLX PEX8780

Front Panel Uplink (Assembly options)

• Without optical uplink
• One Gen3 x8 optical uplink
• Two Gen3 x16 optical uplink8s)

Front Panel Uplink

• 12 LEDs for Ethernet status and activity of 12 AMC slots
• 3 bi-colored LEDs for Ethernet status and activity of 3 optical uplinks
• 1 bi-colored LED for Ethernet status and activity of downlink to CPU on NAT-MCH

Backplane Interconnect

• Gen3 x1 and x4 to each AMC via Fabric D-G or
• Gen3 x8 and x16 switching functionality to reduced number of AMCs
  (not supported by standard backplanes)
• Gen3 x16 link to optional NAT-MCH-RTM

Clock

• 100 MHz PCIe compliant clock signal from NAT-MCH-CLK / NAT-MCH-CLK-PHYS
• PCIe clock can be provided as FCLKA to AMCs