NAT-MCH-CLK

The NAT-MCH-CLK mezzanine allows a flexible selection of the telecom and non-telecom clocking structures as defined in MicroTCA.0.

The on-board Stratum 3 type PLL sources its clock reference from either any of the 12 AMCs, or from an external clock via the front panel.

In conjunction with a PCIe HUB-Module, it provides a PCIe compliant fabric clock (FCLKA) to all AMC slots. This can be either a 100MHz fixed or 100MHz Spread Spectrum clock (SSC) at HCSL signaling level.

The front panel SMA connectors can be used to provide the internal clock to external devices or vice versa.

• Support for AMC clocks CLK1, CLK2, and CLK3 for up to 12 AMCs
• Update clock for a second NAT-MCH in a redundant system
• Two reference Clock I/O on front panel
• Stratum 3 type PLL clock source for telecom applications with various output frequencies
• Telecom CLK signals can be distributed over all Backplane clock connections and the front panel interface
• Variable switching and distribution of clocks by on-board FPGA
• CLK1, CLK2, and CLK3 from all 12 AMCs, the update clocks from a second NAT-MCH, or a signal from the front panel interface can be used as reference for the Stratum 3 PLL
• A PCIe compliant clock signal can be distributed via CLK3 to all 12 AMCs
• Support of M-LVDS or HCSL compliant driver and termination for CLK3 (assembly option)