NAT-AMC-ZYNQUP-SDR

The NAT-AMC-ZYNQUP-SDR is a flexible Software Defined Radio (SDR) in AMC form factor, based on a Xilinx ZynqUltraScale+ FPGA SoC and up to four Analog Devices ADRV9009 transceivers. It  targets at wireless applications that require a scalable number of phase-coherent antennas.

The AMC supports four or eight phase synchronous RF channels, defined by the number of stacked FMC mezzanine cards, and operates over a wide RF tuning range from 75MHz to 6GHz and a maximum channel bandwidth of 200MHz.

The synchronization of multiple SDR AMCs enables you to create large antenna arrays with RF phase-coherent radio channels, i.e. up to 48 RF channels in s single 2U 19” rack space.

The unique combination of an all-programmable Xilinx ZynqUltraScale+ FPGA with integrated quad-core ARM processor and the ADRV9009 RF-front end from the latest Analog Devices family of RF devices make the NAT-AMC-ZYNQUP-SDR the ideal unified SDR platform in AMC form factor for wireless communications systems.

Further features such as observation channels for Digital-Pre-Distortion (DPD) and flexible I/O i.e. for control of external PAs allow solutions for advanced applications.

The NAT-AMC-ZYNQUP-SDR provides the so-called ‘Standalone Mode’ for local operation of the system. With the onboard Xilinx ZynqUltraScale+ FPGA as only processing resource, baseband processing is supported to a certain degree.

In ‘Non-Standalone Mode’, the complete data stream is handled by an external CPU (e.g. Processing AMC). Thus, high-speed PCIe streaming and transceiving of I/Q samples is possible. In this use case, the NAT-AMC-ZYNQUP-SDR is acting as PCIe device towards the host, so very low latency and high data rate I/Q transfer is applicable.

Software Support and FPGA Reference Design

For an easy-to-use experience, the NAT-AMC-ZYNQUP-SDR is accompanied by a comprehensive software package that implements both the control plane, to control FPGA and RF interfaces,  and the data plane, i.e. for continuous low latency streaming of I/Q samples.

The default firmware package contains all modules for starting development of both onboard and target applications:

• Linux board support package (BSP) and device drivers for controlling FPGA IP cores and on-board devices
• A.T. libraries for continous streaming of IQ samples, compliant with GNU Radio and MATLab®
• Sample applications for MATLab®, GNU Radio, and Python
• Applications for control and management
• Software documentation

The default firmware package additionally contains a real time PCIe IQ streaming driver for external signal processing units and an FPGA sample project (project template) as reference design for Xilinx® Vivado® Design Suite with board-specific modules that can be used as a base frame for developing the target application. It contains modules for:

• Wide band receiever and transmitter
• Phased arrays
• Radio direction finding and tracking
• Frequency scanner and signal intelligence
• Radio astronomy and satellite modems
• Advanced wireless research
• Cellular prototyping and proof-of-concept

Thus, our NAT-AMC-ZYNQUP-SDR combines best-in-class hardware (AMC form factor with Xilinx ZynqUltraScale+ FPGA SoC and Analog Devices ADRV9009 transceivers) with a tailored, comprehensive software package.

Technical Papers

To allow customers a fast entry into application specific development with the NAT-AMC-ZYNQUP-SDR unit, N.A.T. has compiled application-specific technical papers that are based on best practice approaches. These documents explicitly describe set-ups, software and hardware setting as well as sample applications including verification procedures. Currently available are technical papers for

• Multi-Unit RF-Phase Synchronization
• Fast Frequency Hopping
• Application Development with NAT-SDR-FLEX and MATLab® and GNU Radio

Deployment Options

The NAT-AMC-ZYNQUP-SDR can be easily integrated into any system hosting AMCs, allowing a flexible and application-specific scaling of the number of RF interfaces. In addition to further SDR units, other AMCs such as processing units etc. can be selected from the market and easily added through a standardized plug-and-play procedure.

For a quick and easy start, N.A.T. offers several housings as turnkey systems available off-the-shelf, each of which allows you to add further NAT-AMC-ZYNQUP-SDR modules. This line of SDR system products, named NAT-SDR-FLEX, is available in three options:

• NAT-SDR-FLEX-S: 1U table-top /set-top-box system
• NAT-SDR-FLEX-M: 19” 1U rack-mount non-redundant system
• NAT-SDR-FLEX-L: 19” 3U rack-mount fully redundant system

Customization

The NAT-AMC-ZYNQUP-SDR consists of the NAT-AMC-ZYNQUP-FMC Carrier Board attached with one or two stacked RF mezzanine boards in the FMC form factor. The NAT-FMC-SDR4-T alone gives you four channels, whereas the combination of NAT-FMC-SDR4-T plus NAT-FMC-SDR4-M offers eight channels.

This modularity makes the platform extremely flexible since the RF front end and front panel I/O can be changed simply by choosing N.A.T.’s FMC-boards with the desired functions. SDR properties, such as number of RF channels, filtering, control IO for external RF components, and high speed interface ports (e.g. QSFP), can be brought into the platform by choosing the right FMC building blocks. Custom mezzanine cards with special functions can be developed in close collaboration with N.A.T..

• AMC form factor, single full-size

Processing Resources

• System on Chip (SoC) Xilinx UltraScale+ ZU7EG or ZU11EG – F1517 footprint
• Application processor: Quad-core ARM Cortex-A53 MPCore up to 1.5 GHz
• Real-time processor: Dual-core ARM Cortex-R5 MPCore up to 600 MHz
• System logic cells: 504k / 653k
• DSP slices: 1728 / 2928
• 14x GTH 16.3Gb/s transceivers to MTCA backplane
• 10x GTH 16.3Gb/s transceivers to mezzanine cards

Memory & Storage

• 8GB DDR4 (x64, 1600-3200Mb/s) for ARM-CPU (PS)
• 8GB DDR4 (x64, 1600-3200Mb/s) for FPGA (PL)
• 4GB eMMC
• SD card holder
• QSPI flash
• Connector for additional memory modules
• Optional RLDRAM3 on module (2133Mb/s, 1 Gb, x36, 8ns tRC) for low latency access (up to 6 times faster than DDR4-3200). Useful for applications requiring RAM look up tables (LUTs)
• Optional QDR4 SRAM or additional DDR4-SDRAM

RF Transceiver

• 4x Analog Devices ADRV9009 dual RF transmitter, receiver and observation receiver
• Maximum receiver bandwidth: 200 MHz
• Maximum tuneable transmitter synthesis bandwidth: 450 MHz
• Maximum observation receiver bandwidth: 450 MHz
• Multichip phase synchronization for RF- and baseband signals
• Multiboard synchronization
• JESD204B IQ sample data interface to FPGA
• Tuning range (center frequency): 75 MHz to 6000 MHz
• RX gain range: 30dB in 0.5dB steps

Front Panel Connectivity

• 8 TX, 8 RX, 8 ORX
• 4 x 7 GPIO 1V8 to ADRV9009
• 4 x 3 GPIO 3V3 to ADRV9009
• 12 x GPIO 1V8 to FPGA
• 1 PPS IN
• CLK OUT
• CLK IN (JESD204b)
• SYNC for JESD204b
• 2x Trigger IN/OUT to FPGA
• Optional clock IN/OUT
• USB/JTAG-Connector
• SD card slot
• Status / Fault / Hot-Swap LEDs

Backplane Connectivity

• 2x 1 GbE at AMC Ports 0/1
• FPGA-LVDS-I/Os at AMC Ports 2/3
• PCIe / Ethernet / custom protocol at AMC Ports 4-15
• Any combinations of PCIe, SRIO, 10G/40G (on request)
• Full AMC TCLKA-D and FCLKA connectivity (bidirectional)
• Point to point connectivity: AMC Ports 12-15 routed to FPGA (2x 4 LVDS)
• 8x MLVDS trigger lines to AMC Ports 17-20
• JTAG access via backplane

Board Support Package

• Linux boot – Linux Drivers
• AXI4 Wrappers to all external/internal interfaces (soon)
• Design example (soon)
• Documentation
• Hardware package scope of delivery:
  • Vivado sample project
  • Linux Board Support Package and Host Driver
  • A.T. SDR Library for up to 8 channel phase synchronous operation and low latency streaming of IQ samples
  • Hardware user manual
  • Sample application for GNU Radio and Matlab