NPMC-STM4

Telecommunications interface board in PMC (PCI mezzanine card) form factor

Overview and Purpose

The NPMC-STM4 is a telecommunications interface board in PMC (PCI mezzanine card) form factor. The NPMC-STM4 is targeted at telecom applications dealing with Synchronous Digital Hierarchy (SDH), such as SS7, ISDN or 3G/3.5G mobile applications in optical OC-12/STM-4 and SONET environments.

Being equipped with an add/drop multiplexer/demultiplexer chipset the NPMC-STM4 is an ideal single board platform to interface between the frame oriented STM-4/SDH networks and classic TDM (Time Division Multiplex) standards as E1/T1/J1 or E3/T3/J3. Possible applications are i.e. add/drop multiplexer or terminal mulitplexer.


Optical Interface

The optical 622Mbps OC-12/STM-4 line interface is available on a standard OC-12 SDH/STM-4 connector at the front panel.


VT/TU Access

The OC-12/STM-4 framer is connected to an add/drop multiplexer/demultiplexer chipset. Since the chipset does the complete SDH pointer processing it is capable of accessing VT/TU tributary unit groups within VC3, VC4 and VC4-4c virtual containers and thus to extract/insert any of the 4*84 T1/J1 or 4*63 E1 streams including the respective clocking information contained in a single STM-4 SDH frame. Supported mappings are VT1.5/VT-2 or TU-11/TU-12 to VC3/VC4/VC4-4c or STM4/STM4c. The chipset supports the M13 and G.747 multiplexing.


T1/J1/E1 Access

The multiplexer/demultiplexer chipset includes 4x84 T1/J1 framers or 4x63 E1 timesliced framers, each having individual Rx/Tx, CLK and SYNC signals. For T1 the framing standards SF, SLC-96 and ESF, for E1 G.704 and G.706 (CRC-4 multiframe), for J1 the TTC JT-G.704 as well CRC-6 calculation are supported. The chip also provides full jitter attenuation.


H.110 and H.110 alike Interfaces

The T1/J1/E1 framers interface to the onboard H.110 contoller. The H.110 controller allows flexible 64kbps timeslot routing between the various E1/T1/J1 streams. Thus it is possible to fully load the capacity of 4096 timeslots of the H.110 bus by the maximum subset of the possible 4x84 T1/J1 or 4x 63 E1 streams jitter-free and synchronised via the backplane.
The H.110 controller is capable of supporting frequencies higher than the standard 8MHz H.110 clock, thus exceeding the number of 4096 64kbps timeslots of a standard H.110 bus.


Backplane TDM Access

The onboard H.110 bus controller offers access to the backplane TDM bus supporting the full H.110 bus (PTMC) or the SC Bus subset on the PMC multi-purpose I/O connectors.


PCI-Interface

The NPMC-STM4 is a P1386.1/Draft 2.0 compatible PMC module, that can be plugged onto any VME, cPCI or other carrier board offering a PMC extension slot. The NPMC-STM4 is PCI Rev. 2.2 compatible (32bit).